While it's nearly impossible to get into a Chinese semiconductor lab, Chinese scientists do tend to share their research, so our colleagues at TechXplore discovered a paper by researchers at Peking University who claim to have developed the industry's first tensor processing unit (TPU) featuring carbon nanotube transistors.
Before we get into the accomplishments that have been achieved, let’s talk a bit about carbon nanotube transistors and their importance. Carbon nanotube (CNT) transistors are essentially gate-all-around (GAA) field effect transistors (GAA FETs) that can be applied to almost anything and have all the features you would expect from a GAA transistor, including enhanced performance and power control, and reduced leakage current. Samsung has been using GAAFETs on its 3nm-class process technology for some time, but so far this production node has been used for fairly simple cryptocurrency mining chips. Intel is using GAA FETs in its CPUs manufactured on the 20A node, and TSMC plans to employ GAA transistors on its N2 process technology, which will enter mass production in the second half of 2025.
Using this process technology featuring CNTs and GAAFETs, researchers at Peking University have built a miniature TPU, the world's first tensor processing unit featuring this type of transistor.
“We report a tensor processing unit (TPU) based on 3,000 carbon nanotube field-effect transistors that can perform energy-efficient convolution and matrix multiplication,” reads a description of the paper published in Nature. “The TPU is built with a systolic array architecture that enables parallel 2-bit integer multiply-accumulate operations.”
A 5-layer convolutional neural network using this TPU can achieve up to 88% accuracy in MNIST image recognition while consuming only 295 µW of power. This is made possible by an optimized nanotube manufacturing process that ensures 99.9999% semiconductor purity and ultra-clean surfaces, resulting in transistors with high on-current density and consistent performance. System-level simulations show that an 8-bit TPU built with nanotube transistors at the 180 nm technology node can operate at a main frequency of 850 MHz and achieve energy efficiency of 1 tera-ops/s per watt.
Researchers believe they can further improve the TPU's performance by tweaking the placement of the GAA FETs, shrinking the size of the transistors, and increasing the bit capacity of the processing units, which could further increase the chip's efficiency and computational power. Integrating the TPU with complementary metal-oxide semiconductor (CMOS) logic is another potential avenue for improvement.
Considering that we are talking about GAA FETs implemented using 180nm-class process technology, the practical utility of this TPU is low to say the least, but having a working TPU circuit will allow researchers to refine their process technology, which is crucial for the further development of China's semiconductor capabilities.
